The present invention relates to memory systems and more particularly distributed buffer memory systems.
With recent advancement of information technology and wide use of the Internet to store and process information, more and more demands are placed on the acquisition, processing, storage and dissemination of information by computing systems. Computing systems are being developed to increase the speed at which the computers are able to execute increasingly complex applications for business, personal use, and entertainment. Overall computer system performance is affected by each of the key elements of the computer structure, including the performance/structure of the processors, any memory caches, input/output (I/O) subsystems, efficiency of the memory control functions, the performance of the memory devices and systems, and any associated memory interface elements, and the type and structure of the memory interconnect interfaces.
The constantly increasing speed of processors which execute increasingly complex applications places more rigorous performance demands on all of the other subsystems in the computer, including the memory subsystem, where data is stored, accessed, and updated numerous times during the operation of a software application. The time consumed by memory read/write operations is a major factor in the ultimate speed and efficiency of a computer system. The memory subsystem of most computers is normally operated by a memory controller. The task of memory controllers is to move data between the computer's memory subsystem and its one or more processors as quickly and efficiently as possible. A computer's memory subsystem often comprises memory modules, usually one or more dual in-line memory modules (DIMMs) that include several dynamic random access memory (DRAM) devices.
In many memory subsystems, a memory controller may control multiple memory channels, where each channel may include one or more Dual In-line Memory Modules (DIMMs), where the DIMMs may be arranged in one or more ranks. Computing demands require the ability to access an increasing number of higher density memory devices at faster and faster access speeds.